1. Field of the Invention
The present invention relates to a semiconductor device which can operate as a dynamic RAM and also as an EEPROM.
2. Description of the Prior Art
In general, a memory device which retains stored data even after the cut-off of power is called a nonvolatile memory (such as an EEPROM, which stands for Electrically Erasable/Programmable Read Only Memory), while a memory device which permits earasing of the stored data by the power cut off is called a volatile memory (such as a RAM, or the like).
Although the nonvolatile memory EEPROM can retain the stored data for a long period of time even after the power is cut off, it takes a relatively long time, such as about 10 msec, for the EEPROM to do perform the writing or erasing of data. Also, the number of times the EEPROM can carry out the writing and erasing operations is limited. Therefore, the EEPROM is not suitable for use in apparatuses that change data frequently.
On the other hand, a RAM which is a volatile memory, requires a very short time, such as 100 nsec, to do the data writing or erasing. Also, there is no limit to the number of times the RAM can to carry out the data writing or erasing. However, RAM has an inconvenience since the stored data is erased if the power is cut off.
In consideration of the above, a nonvolatile RAM (NVRAM) cell has been proposed which is a combination of an EEPROM cell and RAM cell, thereby enabling frequent data change, with a capability of holding the changed data for a long time.
One type of the aforementioned conventional NVRAM combines an EEPROM with a SRAM or DRAM, with the latter having a reduced cell size with respect to the former.
However, even the NVRAM formed by combining an EEPROM with a DRAM cannot achieve the still smaller cell size required for high density devices, and therefore it is not suitable for applications requiring high density.